This invention relates to digested data processing systems, and more particularly to a new and improved multiprocessor arrangement.
Currently available data processing systems can be divided roughly into two categories; Those which support a single, selected instruction set and those which by design support multiple instruction sets. The latter category includes machines which have two or more sets of microcode sequences, sometimes supported by special hardware features, to implement predefined instruction sets. Both categories can be of the single processor or multiprocessor variety. In the case of multiprocessors, it has been customary to provide only one architecture of processors for the support of the user instruction set. Whenever applicable, prior systems have distributed operating system functions and support over some number of processors, all of which have used the memory system as a passive element.